The present invention relates to a power supply circuit, and more particularly, to a method and a circuit for generating a plurality of output voltages from an input voltage with a single regulator.
Japanese Laid-Open Patent Publication No. 2006-320060 describes an example of a power supply circuit including at least two power supply output units, such as series regulators, and generating two power supply outputs.
FIG. 1 is a schematic circuit diagram of a conventional power supply circuit 100 having the structure described in the above publication and including a plurality of regulators. The power supply circuit 100 of FIG. 1 includes first and second regulators 110 and 120 and first and second trim circuits 112 and 122 for adjusting outputs of the first and second regulators 110 and 120.
The first regulator 110 is connected to an input terminal 130 and a first output terminal 132. A capacitor C1 is connected to the first output terminal 132. The second regulator 120 is connected to the input terminal 130 and a second output terminal 134. A capacitor C2 is connected to the second output terminal 134. The input terminal 130 is connected to a power supply 140 and a capacitor C0. The power supply 140 supplies an input voltage VIN to the first and second regulators 110 and 120 via the input terminal 130. The capacitor C0 prevents the input voltage VIN from fluctuating. The capacitors C1 and C2 prevent the first and second output voltages OUT1 and OUT2 from fluctuating due to a load such as an internal circuit (not shown). The second regulator 120 is provided with a control signal S1.
The power supply circuit 100 generates first and second output voltages OUT1 and OUT2, which have the same level, from the input voltage VIN with the two regulators 110 and 120. The power supply circuit 100 generates only the first output voltage OUT1 with the first regulator 110 when the control signal S1 is a disable signal (i.e., the second regulator 120 being inactivated). The power supply circuit 100 generates the first and second output voltages OUT1 and OUT2 at the same level with the first and second regulators 110 and 120 when the control signal S1 is an enable signal (i.e., the second regulator 120 is activated).
FIG. 2 is a schematic circuit diagram of another conventional power supply circuit 200. The power supply circuit 200 of FIG. 2 includes a regulator 210, a trim circuit 212 for adjusting an output of the regulator 210, and a switch circuit SW100. The power supply circuit 200 includes the switch circuit SW100 in lieu of the second regulator 120 and the second trim circuit 122 of the power supply circuit 100 of FIG. 1. The remaining parts of the power supply circuit 200 are the same as the power supply circuit 100 of FIG. 1.
The switch circuit SW100 has a first contact, which is connected to an output terminal of the regulator 210 and a first output terminal 132, and a second contact, which is connected to a second output terminal 134. The switch circuit SW100 is provided with a control signal S2.
The power supply circuit 200 generates first and second output voltages OUT1 and OUT2 having the same level from an input voltage VIN using the single regulator 210. More specifically, the power supply circuit 200 generates only the first output voltage OUT1 when the control signal S2 is a disable signal (i.e., the switch circuit SW100 is inactivated). Further, the power supply circuit 200 generates the first and second output voltages OUT1 and OUT2 when the control signal S2 is an enable signal (i.e., the switch circuit SW100 is activated).
The conventional power supply circuits 100 and 200 have the shortcomings described below.
The power supply circuit 100 shown in FIG. 1 needs to include the two regulators 110 and 120. This increases the circuit scale and cost of the power supply circuit 100. Further, the power supply circuit 100 generates the two output voltages OUT1 and OUT2 from two separate regulators 110 and 120. This causes difficulty in accurately maintaining the two output voltages OUT1 and OUT2 at the same level.
The power supply circuit 200 shown in FIG. 2 generates the two output voltages OUT1 and OUT2 with the same regulator 210. Thus, the power supply circuit 200 is smaller in size than the power supply circuit 100 shown in FIG. 1. However, the first output voltage OUT1 of the power supply circuit 200 instantaneously falls when the switch circuit SW100 goes on.
FIG. 3 is a waveform diagram showing the two output voltages OUT1 and OUT2 of the power supply circuit 200 of FIG. 2. As shown in FIG. 3, the control signal S2 rises to a high (H) level at time t1 to activate the switch circuit SW100. As a result, an output voltage of the regulator 210 increases the second output voltage OUT2. Referring to FIG. 2, this forms a current path P1 between the capacitors C1 and C2 via the first output terminal 132, the switch circuit SW100, and the second output terminal 134. Charge accumulated in the capacitor C1 flows into the capacitor C2 through the current path P1. As a result, the first output voltage OUT1 falls instantaneously as indicated by arrow A in FIG. 3. In this manner, the power supply circuit 200 of FIG. 2 cannot accurately maintain the two output voltages OUT1 and OUT2 at the same level.
It would be advantageous to have a circuit and a method for accurately generating a plurality of output voltages from an input voltage with a single regulator.